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Novel nanoelectronic circuits and systems (Doctoral thesis)

Ράλλης, Κωνσταντίνος/ Rallis, Konstantinos

Lately, in the rise of the era of 2D materials, Graphene is one of the materials that has been extensively investigated for its possible integration in computing devices and thus computing circuits. This is mainly attributed to its very wide set of appealing properties. The combination of its electronic properties with others, such as mechanical, optical or chemical properties, can extend the range of use of computing devices and lead to groundbreaking interdisciplinary applications. However, this integration of Graphene in switching and computing elements is not easy. In this dissertation, the Non-Equilibrium Green’s Function method (NEGF), along with the Tight Binding Hamiltonians, are fitted on experimental data from fabricated Graphene devices. Although as a computational method, NEGF is appropriate for the simulation of small-scale devices in the regime of nanometers, its ability to be efficiently expanded for the description of larger devices is presented. The aforementioned electronic properties of the material are highly related to its shape and structure. Consequently, it requires a very precise fabrication method that can guarantee the minimum presence of defects on the Graphene grid. For that reason, the effect of defects is deeply investigated. The NEGF method is further enhanced in order to be able to incorporate lattice defects. The most common lattice defects are included, meaning the single and double vacancy. A framework has thus been created, so that for the first time the user can select areas of interest on the grid, in which the defects will be concentrated. Those concentrations can also be variable. Moreover, an extensive study is conducted on defective grids with different concentrations of single and double vacancies. The investigated grids are non-rectangular and have regions with different widths. The effect of those vacancies on the electronic properties of Graphene is investigated, and more specifically their effect on the conductance and the energy gap of the device, as well as the effect on circuit-centered characteristics such as the leakage current and ON/OFF current ratio. Having a functional, robust, versatile, and accurate model, the focus of this thesis is extended to the level of circuits. The model is imported into SPICE through Verilog-A. In this part, the thesis emphasizes on the investigation of the switching capabilities of L-shaped Graphene Nanoribbons (GNRs). These structures have been proven to be able to operate as switches, without the use of a back gate, and here, the properties that are dependent on their dimensions are explored and optimized for the first time. The optimized structures are then used for the realization of a set of computing topologies. Initially, a novel area-optimized 2-branch comb-shaped topology is introduced for the realization of a universal computing set that consists of an AND, OR, NOT gate, and a Buffer. All these logic operations can be mapped on the same topology through appropriate biasing. Then, an extension of this, the 3-branch comb-shaped topology is proposed, which is able to operate as a 2-XOR, 3-XOR and 3-MAJ gate. The circuit of a 1-bit full adder, is also presented. For the evaluation of the performance of the topologies, several related metrics are employed such as the area, delay, power dissipation and the power-delay product. The operation of these topologies relies of the principles of Pass Transistor Logic (PTL) and reconfigurable computing. Finally, in an attempt to go beyond the conventional Boolean logic, the compliance of Graphene with Multi-Valued Logic (MVL) circuits and applications is investigated. The ability of a Graphene Quantum Point Contact (G-QPC) device to encode the digits of the radix-4 numeral system is presented and as a proof of concept, the operation of an arbitrary radix-4 adder is explained.